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\title{\bf CALICE ECAL Readout Electronics: Readout Board Overview}

\maketitle

\section{Function}
An overview of the readout board is shown in Fig.~\ref{fig:overview}.
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\begin{figure}
\begin{center}
\includegraphics[width=16cm]{ReadoutOverview.eps}
\caption{Overview of the readout board}
\label{fig:overview}
\end{center}
\end{figure}
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Each readout board handles signals from six VFE-PCB's. It is clocked
with a 12.5MHz clock distributed by an LVDS signal on the custom
backplane.

It can receive a trigger from any one of three sources; an LVDS
differential signal from the custom backplane (originating on
the trigger board, the normal trigger source), a push-button
on the front panel and a VME command. In the case of the standard
trigger, the trigger path across the board is unclocked until it
is received in the slave FPGA and delayed on a 100MHz clock.

Upon receipt of a trigger, the board generates
the control signals to operate the VFE-PCB's
and to clock the analogue data onto
the multiplexed lines. The readout board then digitises these data
and stores them until they are read out via VME.

The VFE-PCB control is handled by a ``slave'' FPGA, one per VFE-PCB,
while the readout board as a whole is controlled by a ``master'' FPGA,
which also handles the VME interface.
The master FPGA loads configuration data to the slaves via a 
read/write data bus when these data are read and written via VME.
It also receives the event data on a one-way point-to-point data
path from the slaves and stores it until read via VME.

The whole board will repeat the trigger sequence on a second trigger,
even if the first has not been read out.

\section{Cost}
All the following prices include VAT and are in FY02/03 \pounds. 
The NRE costs are estimated
at \pounds 800.
The master FPGA could be a XC2S100, costed at \pounds 50,
while the slave FPGA set could be six 
%XC2V40-4FG256CES components,
XC2S30 components, each \pounds 26.
Analog AD7664 ADCs are estimated at \pounds 25 each.
An Analog AD5543, 
0.5 $\mu$sec settling time DAC is \pounds 33.
Other IC components are estimated at \pounds 300 and other hardware
at \pounds 200. The board fabrication and assembly costs are
estimated by comparing with similar boards.
A estimated cost per readout board,
in addition to the \pounds 800 NRE costs, is therefore:
\begin{itemize}
\item ADCs; \pounds 25 per ADC $\times$ 36 ADCs = \pounds 900.
\item Master FPGA; \pounds 50 per FPGA  = \pounds 50.
\item Slave FPGAs; \pounds 26 per FPGA $\times$ 6 FPGAs = \pounds 156.
\item DACs; \pounds 33 per DAC $\times$ 6 DACs = \pounds 198.
\item Other ICs; total = \pounds 300.
\item Other hardware; total = \pounds 200.
\item PCB fabrication and assembly; total = \pounds 850.
\end{itemize}
The total cost per readout board is therefore approximately \pounds 2700.

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