\section{Conclusions}
\label{sec:conclusions}

We have produced a test CMOS sensor which demonstrates much
of the basic functionality
required for a binary ECAL. 
Test
results show one of the two pixel designs functions close to the expected
level.
Gain and noise values from both test and bulk pixels
are very similar to those predicted by
the design simulation. Also, the signal charge spread between
pixels is close to expectations from the pixel simulation.
As part of the sensor development, we worked with the
CMOS foundry to develop the INMAPS process, which enables
us to use a deep P-well implant to shield the signal
charge from the active PMOS circuit elements. Measurements
show this improves the signal collection by a factor of more
than three,
without affecting the gain or noise. This implant
makes the sensor viable.

This work will continue with a new sensor, TPAC~1.2,
which has been designed and fabricated.
The new sensor contains only the pre-shape quadrant 1
pixel design, which was shown to have the better signal-to-noise ratio,
modified to have the trim range extended from four to six bits.
It also implements several fixes, such as
the decoupling of the comparator and monostable power meshes
and correcting the SRAM memory write corruption.
Small adjustments have been made to the pixel layout to
improve the pixel uniformity for noise and gain. 
This sensor is the same
size as TPAC~1.0 and 1.1 and has the same number of pixels. It is 
I/O compatible and so can use the same sensor PCB
and DAQ system.
Results
from the new sensor are expected to be reported
in the near future.
